# ECE437 Makefile

.SUFFIXES: .vhd 
COMPILE.VHDL = vcom
COMPILE.VHDLFLAGS = -93
SRCDIR = ./source
WORKDIR = ./work
VPATH= $(WORKDIR)

#Rules

%.vhd : $(SRCDIR)/%.vhd
	if [ ! -d $(WORKDIR) ]; then vlib $(WORKDIR); vmap lpm $(WORKDIR); fi
	$(COMPILE.VHDL) $(COMPILE.VHDLFLAGS) $(SRCDIR)/$@

# begin VHDL files (keep this)

fetchStage.vhd: fetchInterstageReg.vhd programCounter.vhd typeDefinitions.vhd
fetchInsterstageReg.vhd: typeDefinitions.vhd

idStage.vhd: idInterstageReg.vhd instDecode.vhd registerFile.vhd typeDefinitions.vhd immExt.vhd
idInterstageReg.vhd: typeDefinitions.vhd

execStage.vhd: execInterstageReg.vhd typeDefinitions.vhd alu.vhd
execInterstageReg.vhd: typeDefinitions.vhd

memStage.vhd: memInterstageReg.vhd typeDefinitions.vhd
memInterstageReg.vhd: typeDefinitions.vhd

wbInterstageReg.vhd: typeDefinitions.vhd



adder.vhd: fulladder.vhd
alu.vhd: typeDefinitions.vhd adder.vhd BarrelShifter.vhd aluCmp.vhd 
aluCmp.vhd: adder33.vhd
adder33.vhd: fulladder.vhd
tb_alu.vhd: alu.vhd
aluTest.vhd : alu.vhd bintohexDecoder.vhd


cpuPipeline.vhd: typeDefinitions.vhd wbInterstageReg.vhd fetchStage.vhd idStage.vhd execStage.vhd memStage.vhd MemoryArbiterCombinational.vhd


cpu.vhd : mycpu.vhd VarLatRAM.vhd
mycpu.vhd: cpuStruct.vhd
dcache.vhd : typeDefinitions.vhd dcacheSet.vhd dcache_ctrl.vhd
cpuStruct.vhd: icache.vhd icache_ctrl.vhd dcache.vhd StallLogic.vhd MemoryArbiterCombinational.vhd cpuPipeline.vhd typeDefinitions.vhd ForwardingLogic.vhd

programCounter.vhd: typeDefinitions.vhd pcExtAdd.vhd pcExt.vhd pcAdj.vhd pc.vhd fouradder.vhd

VarLatRAM.vhd : ram.vhd
MemoryArbiterCombinational.vhd : VarLatRAM.vhd
MemoryArbiter.vhd : VarLatRAM.vhd
StallLogic.vhd: typeDefinitions.vhd

tb_cpu.vhd: cpu.vhd
cpuTest.vhd: cpu.vhd bintohexDecoder.vhd

# end VHDL files (keep this)

# Cache rules (cache labs)
# replace this ramAxB.vhd with your own
ram16x50.vhd : 220model.vhd
220pack.vhd:
	if [ ! -d $(WORKDIR) ]; then vlib $(WORKDIR); vmap lpm $(WORKDIR); fi
	$(COMPILE.VHDL) -87 ${HOME437}/lib/LPM/220pack.vhd
220model.vhd: 220pack.vhd
	if [ ! -d $(WORKDIR) ]; then vlib $(WORKDIR); vmap lpm $(WORKDIR); fi
	$(COMPILE.VHDL) -87 ${HOME437}/lib/LPM/220model.vhd

# Lab Rules DO NOT CHANGE THESE
# OR YOU MAY FAIL THE GRADING SCRIPT
lab1: registerFile_tb.vhd
lab2: tb_alu.vhd
lab4: tb_cpu.vhd
lab5: tb_cpu.vhd
lab6: tb_cpu.vhd
lab7: tb_cpu.vhd
lab8: tb_cpu.vhd
lab9: tb_cpu.vhd
lab10: tb_cpu.vhd
lab11: tb_cpu.vhd
lab12: tb_cpu.vhd


# Time Saving Rules
clean:
	$(RM) -rf $(WORKDIR) *.log transcript \._* mapped/*.vhd *.hex
